LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY mux4chan IS
	PORT(
		I0, I1, I2, I3, S0, S1, nE	: IN	STD_LOGIC;
		Z					: OUT	STD_LOGIC);
END mux4chan;

ARCHITECTURE a OF mux4chan IS
	SIGNAL input: STD_LOGIC_VECTOR (2 DOWNTO 0);
	
BEGIN
 --  Concurrent Signal Assignment
 input (2) <= nE;
 input (1) <= S1;	
 input (0) <= S0;

 --  Selected Signal Assignment
 WITH input SELECT
	Z	 <= 	I0 WHEN "000",
			I1 WHEN "001",
			I2 WHEN "010",
			I3 WHEN "011",
			
			'0' WHEN others;
	
END a;